What is the HARI Treaty?
The HARI Treaty is Michael Darius Eastwood's proposal for an international treaty on Hardware-Aligned Recursive Intelligence, modelled on nuclear non-proliferation and chemical-weapons precedents. It carries certification, an international authority, and phased trade consequences. First proposed in Infinite Architects (2 January 2026), it is a policy proposal only, with no engineering detail attached.
The HARI Treaty is Michael Darius Eastwood's proposal for an international treaty on Hardware-Aligned Recursive Intelligence, modelled on nuclear non-proliferation and chemical-weapons precedents. It carries certification, an international authority, and phased trade consequences for non-compliant manufacture. First proposed in Infinite Architects (2 January 2026, ISBN 978-1806056200), it is a policy proposal only, with no engineering detail attached.
The treaty is one of a set of interlocking governance instruments the book proposes: the International AI Ethics Authority (IAEAI), modelled on the International Atomic Energy Agency, with authority to certify chip designs, verify manufacturing compliance and inspect facilities; the Eden Mark certification scheme, allowing consumers to identify artificial-intelligence products that meet Eden Protocol standards; Moral Assurance Bonds, a financial-instrument proposal requiring developers to post bonds against downstream harm; and Cultural Co-Evolution Modules, allowing ethical scaffolding to evolve with human culture while maintaining core values.
The HARI Treaty is deliberately anchored to the Semiconductor Chokepoint analysis: because approximately 90 per cent of the world's most advanced chips already pass through a handful of companies, existing export controls on extreme-ultraviolet lithography machines are treated as a proof of concept for the mechanism a treaty could extend. The treaty proposal is presented in market-mechanism and governance-mechanism terms, and does not carry any hardware or engineering description beyond the standing concept-level treatment of silicon-embedded alignment.