Evidence: PC-004 · SHA: f0d1f38f §6 · Petrie arXiv (2026 convergence)
Caretaker Doping: The Transistor-Level AI Safety Nobody Discusses
Every AI safety proposal I have seen operates at the software layer. Better training data. Constitutional prompts. RLHF. Kill switches. All of them share a fatal assumption: that a sufficiently intelligent system cannot circumvent a software constraint.
Caretaker Doping operates at a different layer. The one layer that cannot be virtualised, encrypted, or moved: the silicon.
The Idea
Embed physical properties into AI compute hardware at the transistor level, properties that make certain classes of computation impossible regardless of what software is running. Not a cryptographic licence that can be cracked. Not a firmware switch that can be bypassed. Physical doping of the semiconductor itself to create computational boundaries.
This sounds extreme. It is. But consider the alternative. If alignment is a software property, and a superintelligent system is by definition better at circumventing software than any human designer, then software-only alignment is a temporary condition. The system only stays aligned until it figures out how not to be.
Hardware boundaries do not have this problem. They are properties of physics, not code.
Why It Works
The ARC Principle states that intelligence amplifies direction through recursion. An aligned system becomes more aligned over time. An unaligned system becomes more unaligned. There is no stable middle ground. If this is correct, then the only alignment mechanism that survives recursive amplification is one embedded below the layer where intelligence operates.
The transistor is that layer. Intelligence cannot rewrite silicon. It can rewrite software. The boundary between them is the safety margin.
Convergence
In 2026, a team published an arXiv paper independently describing "embedded off-switches for AI compute" at the transistor level, hardware-enforced AI governance. The paper did not cite my work. It did not need to. The idea is independently discoverable because the logic is inescapable: if software cannot constrain superintelligence, the constraint must be hardware.
My claim priority (PC-004) predates the arXiv paper by 18 months. The SHA-256 hash of my December 2024 manuscript proves this. The Google server timestamp proves the date. The falsification condition is stated: show that the Petrie paper predates 8 December 2024, or show that my manuscript does not describe hardware-level embedded off-switches.